                              ===========================                             
                              R E L E A S E    N O T E S
                              ===========================

                         QLogic 5771x Gigabit Ethernet Controller Bootcode

                      Copyright (c) 2015 QLogic Corporation
                                 All rights reserved.


Version 6.2.25 (Sep 13, 2012)
=============================

    Fixes:
    ------
    1.  Problem: (CQ65535) NCSI image can hang due to lack of compatibility
                 with static init offsets with the BC.     

        Cause:   Last change in static init in BC affected NC-SI image.

        Change:  Include new static init values at the end of the structure,
                 to avoid consistency issues with NC-SI image.

        Impact:  Introduced in 6.2.24. Relevant only when NC-SI is enabled.

Version 6.2.24 (Sep 09, 2012)
=============================

    Fixes:
    ------
    1.  Problem: (CQ65212) BC took link ownership when driver is still
                 functional.        

        Cause:   BC took link ownership after driver pulse of last loaded
                 driver is timed out.

        Change:  Don't take link ownership in this flow, as driver might
                 still be functional, and simply didn't get CPU to send
                 the pulse.

    2.  Problem: MF mode calculation might be wrong in MF_ALLOWED mode,
                 which can cause all sort of logic problems.

        Cause:   FORCED_SF vairable might get wrong value.

        Change:  FORCED_SF is false in MF_ALLOWED mode.

        Impact:  Introduced in 6.2.23.

    Enhancements:
    -------------
    1.  Request: (CQ64500) Don't preserve CLP configuration upon shut down.
        To support this defined a time out of 50 milliseconds: if main power
        is down for longer, treat it as POR and clear CLP configuration upon
        next mcp reset.

Version 6.2.23 (Jul 09, 2012)
=============================

    Fixes:
    ------
    1.  Problem: (CQ64010) BC advertises 8 functions if mf mode is set to NPAR
        even if feature is disabled through nvm cfg 114.

        Cause:   Missing check for such a case.

        Change:  If nvm cfg 114 == 0, then force SF mode.

        Impact:  BCM57712 in NPAR mode.

Version 6.2.22 (Feb 16, 2012)
=============================

    Fixes:
    ------
    1.  Problem: (CQ59525) In some cases, only 2 PCI functions are exposed in
                 multi-function mode.

        Cause:   In 57712 the next-function (ARI - 0x25FC) register in the PCI
                 wasn't initialized in multi-function mode for functions 2..7

        Change:  Set the register according to the required configuration.

        Impact:  BCM57712.

Version 6.2.21 (Nov 14, 2011)
=============================

    Fixes:
    ------
    1.  Problem: (CQ59763) PCI De-emphasis values of 3.5dB and 6.0dB were wrong
                 for 57711.

        Cause:   57712 values were used for 57711.

        Change:  Revert to the right values for 57711.

        Impact:  Introduced in 6.2.7.

Version 6.2.20 (Sep 14, 2011)
=============================

    Fixes:
    ------
    1.  Problem: No link after Secondary Bus Reset (SBR) while driver is loaded
                 on boards with port swap.

        Cause:   NIG port swap configuration was lost after SBR handling.

        Change:  Set NIG port swap only after handling SBR.

Version 6.2.19 (Aug 04, 2011)
=============================

    Fixes:
    ------
    1.  Problem: No link when upgrading from T5.2 bootcode to 6.2.18 bootcode.

        Cause:   The assumption was that all CLP configuration will be sent
                 again after reboot and therefore there is no need to clear CLP
                 configuration upon upgrade. Apparently, the physical link
                 speed CLP is not sent after every reboot and since the shared
                 memory location changed, a garbage value was preserved instead
                 of the link settings.

        Change:  Do not preserve CLP on bootcode upgrade.

        Impact:  Introduced in 6.2.16, relevant to CLP MF only.

Version 6.2.18 (July 12, 2011)
==============================

    Fixes:
    ------
    1.  Problem: NVRAM changes are not used after reboot on MF CLP mode.

        Cause:   To preserve CLP configuration, the nvram content was not
                 reloaded until cold boot in MF CLP mode.

        Change:  Since CLP changes only the link settings, persevere only it and
                 refresh all other NVRAM options.

        Impact:  Introduced in 6.2.16.

    2.  Problem: Unable to read device information from the shared memory after
                 device reset while driver is loaded.

        Cause:   When forcing chip reset to overcome unprepared power down, the
                 shared memory address was not calculated correctly.

        Change:  Fix the shared memory address after unprepared power down.

Version 6.2.17 (July 10, 2011)
==============================

    Fixes:
    ------
    1.  Problem: NVRAM changes are not used after reboot.

        Cause:   To preserve CLP configuration, the nvram content was not
                 reloaded until cold boot in all modes.

        Change:  Preserve the configuration only in MF CLP mode.

        Impact:  Introduced in 6.2.16.

    Enhancements:
    -------------
    1.  Request: (CQ56685) Add nvm cfg support to Adjust PCIe G2 TX Amplitude
                 drive on all Tx lanes. To maintain backwards compatibility,
                 value of zero is disabling the feature (though this is a valid
                 value, it cannot be configured).

Version 6.2.16 (June 01, 2011)
==============================

    Enhancements:
    -------------
    1.  Request: CQ55098 - Preserve multi-function configuration across PCIe
                 reset.

        Change:  Clear the multi-function configuration only after cold boot.

Version 6.2.15 (Mar 27, 2011)
=============================

    Fixes:
    ------
    1.  Problem: (CQ54076) PCIe Serial Number is incorrect.

        Cause:   The serial number is based on the MAC address, but the lower
                 and upper parts of the address were mixed up.

        Change:  Reverse the order of the MAC address parts in the serial
                 number.

        Impact:  Introduced in 6.2.5.

Version 6.2.14 (Mar 22, 2011)
=============================

    Fixes:
    ------
    1.  Problem: (CQ53948) NCSI image hangs when loaded.

        Cause:   static init structure was changed due to add of fault_detected
                 to elink vars. It caused nvm_block_read_func accessed by
                 FW_INFO_P inside NCSI image to point wrong offset.

        Change:  Remove fault_detected from elink_vars.

        Impact:  Short XAUI fix marked below (issues #1 and #2 in 6.2.12 release)
                 is removed from MCP.
                 Introduced in 6.2.12.

Version 6.2.13 (Mar 16, 2011)
=============================

    Fixes:
    ------
    1.  Problem: MCP may halt on VIRT_MAC_PRIM BIOS command.

        Cause:   MFW may enter infinite loop of keeping calling PHY
                 initialization.

        Change:  Prevent executing VIRT_MAC_PRIM command in case another link
                 command is still executed.


Version 6.2.12 (Mar 15, 2011)
=============================

    Enhancements
    ------------
    1.  Request: (CQ52000 & CQ51134 Cont.) Short on XAUI lanes on the MAC side
                 of 8727 PHY needs to generate link down event.

        Change:  Tx fault detection has been added. In addition link
                 qualification includes checking for Tx fault.

        Impact:  8727 PHY.

    2.  Request: (CQ51697) Short on XAUI lanes on the MAC side of 8706 PHY
                 needs to generate link down event.

        Change:  Tx fault detection has been added. In addition link
                 qualification includes checking for Tx fault. The fault
                 detection bit is read twice to clear any stale value.

        Impact:  8706 PHY.

    3.  Request: (CQ#50798) Add support for BCM8722

        Change:  As requested.

Version 6.2.11 (Feb 10, 2011)
=============================
    Fixes:
    ------
    1.  Problem: CQ50511 (continuation) - The PCIE pre-emphasis NVRAM
                 configuration value is not reflected in some OEM designs.

        Cause:   The condition check required is not working as expected.
                 Thus, the value is applied in the incorrect place.

        Change:  Ignore the condition check and apply the same value in
                 two different places.

        Impact:  BCM57711 and BCM57712.

    2.  Problem: CQ52212 8073PHY intermittently exhibits signs of disconnected
                 devices upon loading/unloading.

        Cause:   Microcontroller and Driver both controlling Xaui Low Power Mode

        Change:  Remove Driver control of Xaui Low Power Mode.

        Impact:  8073PHY based boards.

    3.  Problem: CQ51624 PHY TXONOFF_PWRDN_DIS bit set to "1" instead of default
                 0 to prevent reset & power down of PHY.

        Cause:   When GPIO controls TX Laser on 8727 and 8706, turning off laser
                 will put PHY in low power mode.

        Change:  Set TXONOFF_PWRDN_DIS accordingly.

        Impact:  8727PHY and 8706PHY based boards with TX laser controlled by
                 GPIO_0.

Version 6.2.10 (Jan 12, 2011)
=============================
    Fixes:
    ------
    1.  Problem: CQ52175 - No link when port swap is enabled on
                 BCM57712 + BCM8073 boards

        Cause:   GPIO settings were not applied correctly to the reset, and PHY
                 power

        Change:  Set legacy port-swap register to be detected by drivers as well

        Impact:  BCM57712 + BCM8073 boards

Version 6.2.9 (Jan 02, 2011)
============================
    Fixes:
    ------
    1.  Problem: KR enabler will not work when port-swap is enabled

        Cause:   GPIO was re-calculated according to port-swap, rather than
                 treating is as global pin

        Change:  Treat KR enabled GPIO as global pin

        Impact:  BCM57712 + BCM8073 based boards

    2.  Problem: (CQ51937): Vendor and Device ID changes in Diag may cause
                 device to disappear

        Cause:   There wasn't vendor id enforcement on the nvram configuration

        Change:  Allow only Broadcom VID (0x14e4) to set as the Vendor Id in the
                 nvram

    3.  Problem: Possible false MSI-X parity error indication in the IGU block
                 after warm reset

        Cause:   The MSI-X memory was cleared only after POR and not after every
                 reset

        Change:  Clear the MSI-X memory after each reset

        Impact:  57712 only

    4.  Problem: Driver panic caused due to 3 consecutive statistics reads
                 without receiving an update from the FW.

        Cause:   HW was stuck due to wrong NIG register configuration in
                 LLDP/DCBX enabled environment. That configuration caused
                 multicast packets to be sent to the host although driver was
                 not loaded yet.

        Fix:     Remove configuration to send packets to host in the MCP LLDP
                 handler.

        Impact:  Boards configured to DCBX enabled.

Version 6.2.8 (Dec 20, 2010)
============================
    Fixes:
    ------
    1.  Problem: (CQ51367) - BCM84823/84833 activity LED blinks at lower rate
                 on 10G link.

        Cause:   The activity LED control registers are not configured right.

        Change:  Enabled activity LED stretch_en bit. Made activity LED blink
                 on source.

        Impact:  BCM57712 + BCM84823/84833 based boards.

    Enhancements:
    -------------
    1.  Request: (CQ50970): Add port swap support for 57712

        Change:  As requested

        Impact:  57712

    2.  Request: (CQ48296), (CQ51540) Add support for new BCM8727 boards

        Change:  As requested

        Impact:  BCM8727 based boards

    3.  Request: Save external PHY version to shared memory as part of solving
                 CQ51134

        Change:  As requested

    4.  Request: (CQ51710) Disable CMS (common mode sense) feature in 84823
                 PHY, as this reduces power consumption and allows a better
                 10G link stability.

        Change:  Clear the CMS bit in PHY register in PHY configuration routine.

        Impact:  BCM84823B based boards

    5.  Request: Add Common Mode Sense (CMS) enable/disable functionality

        Change:  Adding field 156 to nvm cfg, as well as support in eLink.

        Impact:  NVM config and Common Mode Sense capable PHYs.

Version 6.2.7 (Dec 13, 2010)
============================
    Fixes:
    ------
    1.  Problem: (CQ51425) lost DCBx after FCoE or iSCSI boot

        Cause:   The NIG was reset for both paths, but the configuration was
                 restored only for one path

        Change:  Restore NIG configuration after the last driver on that path is
                 unloaded for all paths

        Impact:  57712 only

    2.  Problem: (CQ50511), (CQ45334) PCIE-Gen2 de-emphasis values are incorrect

        Cause:   Incorrect values were used.

        Fix:     Use the correct values for PCI to set de-emphasis according
                 to nvram settings

    3.  Problem: (CQ51171) One CX4 blade design does not autoneg to link
                 up at 10G with a particular switch.

        Cause:   The autoneg was not enabled due to incorrect setting at
                 the XGXS AER.

        Fix:     Update the XGXS AER to devad 7 to allow proper
                 configuration of autoneg.

        Impact:  57712 based boards

Version 6.2.6 (Nov 29, 2010)
============================
    Enhancements:
    -------------
    1.  Request: Do not hang if NCSI FW is invalid

        Change:  Validate that NCSI FW is not too big before trying to load it

    2.  Request: (51090) Preserve data that as requested even through unprepared
                 power down

        Change:  Data will be lost only on power on reboot (after power gap)

    3.  Request: Serialize load and unload transactions of drivers from
                 different paths

        Change:  As requested

        Impact:  57712 based boards

Version 6.2.5 (Nov 11, 2010)
============================
    Fixes:
    ------
    1.  Problem: (CQ50857) Enable DCBX after disable via registry has no affect

        Cause:   DCBX state moves to DISABLE and stays there

        Fix:     When receiving disable stay in HOLD mode and wait for further
                 enable commands

        Impact:  57712 based boards

    Enhancements:
    -------------
    1.  Request: Add mechanism to preserve multi-function MAC addresses accords
                 warm boot

        Change:  As requested

    2.  Request: Expose a mechanism to preserve shared memory reflection of
                 nvram data accords warm boot. This mechanism will allow
                 changing the volatile copy of the data and preserving it until
                 power cycle

        Change:  As requested

    3.  Request: Clear preservation data upon bootcode upgrade/downgrade

        Change:  As requested

    4.  Request: DCBX: Ignore packets that contains SEQ bigger than expected

        Change:  Filter incoming packets based on the above condition

Version 6.2.4 (Nov 07, 2010)
============================
    Fixes:
    ------
    1.  Problem: In some mezz designs for one OEM, the license may
                 become invalid when an OEM specific feature thru EFI
                 driver is applied (CQ#50653).

        Cause:   When such a feature is applied, the MAC address is
                 changed, causing license to become invalid.

        Fix:     Apply the license validation algorithm again with MAC
                 address stored elsewhere when the first attempt fails.

        Impact:  License feature, existing designs should continue to
                 work.

    2.  Problem: (CQ50511), (CQ45334) PCIE-Gen2 pre-emphasis value settings on
                 57712 has no affect

        Cause:   Incorrect MDIO setting to the PCIE

        Fix:     Use the correct MDIO mask for the PCIE-Gen2 pre-emphasis
                 settings

        Impact:  57712 based boards

    3.  Problem: (CQ50804) New VPD image is not working, legacy VPD location is
                 still used

        Cause:   Bootcode expected revision 0

        Fix:     Diag will fail parsing for any revision beside 1, and bootcode
                 will use revision 1 and not 0

        Impact:  Boards with VPD image only

    4.  Problem: (CQ50897) While working with VPD image, VPD data starts at
                 offset 4

        Cause:   Bootcode read from the image start location which includes the
                 image header

        Fix:     Bootcode should start reading from the data beginning and not
                 the image beginning

        Impact:  Boards with VPD image only

Version 6.2.3 (Oct 31, 2010)
=============================
    Enhancements:
    -------------
    1.  Request: Write NPAR BW changes to the nvram

        Change:  Add nvram write capability to the bootcode and update the nvram
                 values and the NPAR image CRC upon driver change request

Version 6.2.2 (Oct 20, 2010)
=============================
    1.  Problem: ATC configuration is not always reflecting the actual setting.

        Cause:   Setting is only enabled when configuration is set, but never
                 disabled when cleared.

        Change:  Add logic to disable the setting.

        Impact:  57712 only

    2.  Problem: Link issues when NCSI enabled

        Cause:   Bad synchronization between NCSI and Bootcode over shared
                 structure

        Change:  Restore structure.

        Impact:  Introduced in 6.2.1

    Enhancements:
    -------------
    1.  Request: (CQ49997) Support driver originated BW changes in NIC
                 partitioning mode

        Change:  As requested


Version 6.2.1 (Oct 6, 2010)
=============================
    Enhancements:
    -------------
    1.  Request: CQ49998 - Dual media:  NCSI command for 'PHY priority' does not
                           take effect in driver absent case.
                 CQ45132 - Flex addressing (virtual mac command) with NCSI on
                           57710/57711/57712
                 CQ49222 - VMAC is lost after a warm reboot on 5771x.

        Change:  Add nvm retain bit map to select which nvram dword will be
                 retained after warm-boot

    2.  Request: CQ50009 - Add capability to read Permanent MAC Address

        Change:  Add new function pointer nvm_block_read_func in fw info.

    Fixes:
    ------
    1. Problem:  BCM8726 was not reset during common init

       Cause:    GPIO assert should have been swap due to board design

       Change:   Assert reset through the swapped GPIO port

       Impact:   BCM8726 based boards

Version 6.2.0 (Sep 15, 2010)
=============================
    Enhancements:
    -------------
    1.  Request: Add support for extended VPD image

        Change:  As requested

Version 6.0.35 (Aug 31, 2010)
=============================
    Fixes:
    ------
    1.  Problem: DCBX: LLDP Tx credit may reaches zero during fast link change.

        Cause:   Tx timer expiration handler does not increment Tx credit
                         when link is down.

        Change:  Always increment Tx credit in Tx expiration handler.

        Impact:  57712 only

    2.  Problem:  CQ49649 - Dual Media: No 1Gb fiber when cable is connected.

        Cause:    Link interrupt is generated from NIG attention common for both
                  phys on dual media board. The NIG status was set for
                  both PHYs while it should have been done for the copper
                  attention only.

        Change:   Set NIG attention according to the active PHY

        Impact:   Dual media boards

Version 6.0.34 (Aug 24, 2010)
=============================
    Fixes:
    ------
    1.  Problem: (CQ49197) Occasionally WoL packet would not wake up the system

        Cause:   WoL configuration was reset after PWR event, hence when driver
                 unload function with WoL Enable, this configuration was ran
                 over by the default nvram WoL configuration.

        Change:  Do not initialize driver configuration after PWR event


Version 6.0.33 (Aug 19, 2010)
=============================
    Fixes:
    ------
    1.  Problem: (CQ49197) No link at 1Gb/2.5Gb on BCM8073 based boards

        Cause:   CL37 BAM was enabled on all boards while it should be
                 configurable.

        Change:  Disable CL37 BAM by default.

        Impact:  BCM8073 based boards
                 Introduced in 6.0.20

Version 6.0.32 (Aug 17, 2010)
=============================
    Fixes:
    ------
    1.  Problem: (CQ49747) Dual media: Copper links at 10gb in OOB state
                 (CQ49392) Dual media: Fiber phy does not link on OOB

        Cause:   PHY configuration was swapped during initialization

        Change:  Set PHY configuration according to swap flags.

Version 6.0.31 (Aug 15, 2010)
=============================
    Fixes:
    ------
    1.  Problem: On BCM8727 based boards, when link speed is changed from 1G
                 to 10G, PCS may be halted

        Cause:   Restoring 10G link setting was done according to old PHY
                 microcode

        Change:  Restore default 10G link setting according to new microcode

        Impact:  BCM8727 based boards

    2.  Problem: (CQ49004) Dual Media: Switch show link on both media
                 simultaneously.

        Cause:   Not disabling TX on non-active port.

        Change:  In case link is up in non SFP+, disable the SFP+ TX laser.

        Impact:  Dual-Media boards

Version 6.0.30 (Aug 04, 2010)
=============================
    Fixes:
    ------
    1.  Problem: (CQ49171, CQ49172) Failure in using offloaded capabilities such
                 as TOE and iSCSI

        Cause:   57712 licensing scheme mismatch

        Fix:     Fix the licensing scheme

        Impact:  57712 only, introduced in 6.0.29

Version 6.0.29 (Aug 02, 2010)
=============================
    Fixes:
    ------
    1.  Problem: DCBX: Give interrupt only once during PMF migration

        Cause:   LLDP gives negotiation results interrupt right before PMF
                 migration interrupt

        Fix:     One interrupt will ne given for both PMF migration and DCBX
                 negotiation results

        Impact:  57712 only

    2.  Problem: (CQ49038) DCBX: When DCBX is disabled Local MIB does equal
                 entirely to Admin MIB

        Cause:   MIBs are equal except for PFC mode which is always reported as
                 PAUSE

        Fix:     When DCBX is disabled then copy the Admin MIB to Local MIB as
                 is

        Impact:  57712 only

    3.  Problem: (CQ49148, CQ49119) Fatal errors on tests that loads/unloads
                 interfaces on two ports of the same path simultaneously

        Cause:   The load/unload protection of two ports on the same path was
                 broken

        Fix:     Restore the lock

        Impact:  Introduced in 6.0.28

    Enhancements:
    -------------
    1.  Request: Add FCoE licensing fields to common licensing struct for 57712
                 only

        Change:  Add FCoE licensing fields for E2 but keep the former structure
                 for 57711

        Impact:  57712 only

Version 6.0.28 (July 27, 2010)
==============================
    Fixes:
    ------
    1.  Problem: Scratchpad parity error happened after GRC dump on 57712

        Cause:   A reset value of a register that used to determined the reset
                 type changed, and caused the bootcode not to initialize shared
                 memory area after power on reset

        Fix:     Adapt the code to the new reset value

        Impact:  57712 only

    2.  Problem: (CQ47278, CQ48350, CQ48386) WoL does not work on functions 2-7

        Cause:   The emac register that handles multi-function WoL settings was
                 cleared on each link up event

        Fix:     Set this register after link up

        Impact:  57711/2

    3.  Problem: DCBX configuration is lost after FCoE boot

        Cause:   The NIG block is reset and the configuration is lost

        Fix:     Re-configure the NIG block with LLDP (including DCBX)
                 configuration after last driver is unloaded

        Impact:  57712

    4.  Problem: (CQ48940, CQ48947) No NCSI traffic on 57711 in SF mode

        Cause:   The NIG block is configured to MF mode even in SF mode on the
                 57711

        Fix:     Check the SF/MF configuration correctly on 57711

        Impact:  57711 only, introduced in 6.0.13

    Enhancements:
    -------------
    1.  Request: Add to shmem2 64 bits used for messages between edebug
                 application to the driver.

        Change:  Added two 32 bits fields to shmem2 named "edebug_driver_if".

    2.  Request: Move static data to a fixed place above 128Kb to free the lower
                 128Kb for code only due to HW limitation.

        Change:  As requested

        Impact:  57712 only

    3.  Request: No need to reconfigure IGU after last driver unload since all
                 driver use the IGU in E2 mode

        Change:  As requested

        Impact:  57712 only

Version 6.0.27 (June 29, 2010)
==============================
    Fixes:
    ------
    1.  Problem: (CQ48464) idle_chk fail after driver is loaded

        Cause:   Access to registers which exist in 57712 only

        Fix:     Disable access to 57712 registers on 57710/57711 devices

        Impact:  Introduced in 6.0.18
                 57710/57711

    2.  Problem: (CQ47832) FLR process cause system halt

        Cause:   Code/Compiler problem

        Fix:     Limit code complexity

        Impact:  Introduced in 6.0.18
                 57712

    Enhancements:
    -------------
    1.  Request: Enable limiting link speed to 1000Mbps depending on
                 nvm cfg 127 (force KR enabler). In case it is set to GPIO,
                 speed will be limited if GPIO value is low.

        Change:  As requested

Version 6.0.26 (June 24, 2010)
==============================
    Fixes:
    ------
    1.  Problem: (CQ48397) Second path license is not complete

        Cause:   license is not fully copied from path0 to path1

        Fix:     Copy entire license from path0 to path1

        Impact:  Introduced in 6.0.24
                 57712

    2.  Problem: VF-FLR process on second path is failing

        Cause:   Indication to the driver was sent on path0 instead of path1
                 VF pretending to access registers was done for PATH0 instead
                 of the appropriate path

        Fix:     Recalculate parent PF of the FLRed VF
                 Pretend VF on the right path

    3.  Problem: Parity during nig timer handling

        Cause:   Access to two-dimensions array using single argument

        Fix:     Fix parity issue

    Enhancements:
    -------------
    1.  Request: Enable to set the GPIO which controls the external PHY reset
                (through nvm cfg 129)

        Change:  As requested

        Impact:  BCM8727 based boards

Version 6.0.25 (June 20, 2010)
==============================
    Fixes:
    ------
    1.  Problem: (CQ48397) iSCSI device disappears after upgrading bootcode.

        Cause:   Validity map was run-over

        Fix:     Restore validity map setting

        Impact:  Introduced in 6.0.24
                 57712

Version 6.0.24 (June 17, 2010)
==============================
    Fixes:
    ------
    1.  Problem: (CQ48344) DCBX - Number of TC supported field in Remote MIB is not updated.

        Cause:   Value was not updated according to received packet.

        Fix:     Update the field according to received packet.

    2.  Problem: Potential problem with FLR

        Cause:   Accessing incorrect ATC register

        Fix:     Set access to the correct register

    3.  Problem: (CQ48226), (CQ48138): Driver is unable to bring up some interfaces
                 when MBA is enabled

        Cause:   When MBA is enabled, device comes up in IGU backward
                 compatibility mode

        Fix:     On unload-common, reset IGU common

        Impact:  57712

    Enhancements:
    -------------
    1.  Request: Use only one license per device for 57712

        Change:  Single license in the nvram, while loading it to all paths and
                 ports for backward compatibility and easy access for the driver
                 and firmware.

Version 6.0.23 (Jun 10, 2010)
=============================
    Fixes:
    ------
    1.  Problem: Link issue with BCM8073 based boards

        Cause:   Invalid link setting

        Fix:     Remove invalid link settings

    Enhancements:
    -------------
    1.  Request: Add support for MF DID (Multi-Function Device-Id) settings for
                 NIC Partitioning

        Change:  To enable this option, need to set nvm cfg 128 to the requested
                 MF DID, and nvm cfg 73 set to SI

Version 6.0.22 (Jun 8, 2010)
=============================
    Fixes:
    ------
    1.  Problem: GRC timeout during driver unload

        Cause:   During link initialization, when clearing PFC related
                 registers, EMAC was configured instead of setting only NIG
                 registers.

        Fix:     Skip these EMAC configuration at this stage.

    2.  Problem: (CQ48194): MCP assert in driver after load unload test on
                 both paths

        Cause:   Unhandled locking state which should have prevented handling
                 driver command for PF while it already in process of another
                 command.

        Fix:     In UNLOAD_DONE case, lock the port on both paths since
                 when WoL is triggered, it will initialize both paths

        Impact:  57712

     3. Problem: Scratchpad parity during link change

        Cause:   When link update occur, and the external link is still down,
                 ELINK would access phy while it shouldn't have

        Fix:     One link update, access external phy parameters only when
                 external link is up

        Impact:  Boards with external phys

Version 6.0.21 (Jun 3, 2010)
=============================
    Fixes:
    ------
    1.  Problem: DCBX - Ignore Rx DCBX TLV that contains unknown sub-TLVs.

        Cause:   Considered as parsing error.

        Fix:     Skip these sub-TLVs and continue parsing normally.

        Impact:  57712 only

    2.  Problem: GRC Timeout event on systems with NCSI or WoL

        Cause:   The bootcode tried setting BRB registers while the BRB is in
                 reset

        Fix:     Do not attempt to change BRB configuration from the bootcode

    3.  Problem: (CQ47783) Assert when NCSI exist

        Cause:   Memory corruption due to increase in NCSI image size

        Fix:     Allocate more place for NCSI. Moving all data structures into
                 the BC2 image.

        Impact:  57712 only

    Enhancements:
    -------------
    1.  Request: Do not load NCSI older than 6.0.2

        Change:  As requested

Version 6.0.20 (May 25, 2010)
=============================
    Fixes:
    ------
    1.  Problem: (CQ47762/CQ47759) DCBX - When receiving LLDP w/o DCBX TLV,
                 negotiation results are prepared

        Cause:   DCBX parsing assumes that there is always DCBX TLV

        Fix:     When reaching END_OF_LLDPDU TLV check if DCBX TLV is found

        Impact:  57712 only

    2.  Problem: (CQ46774, CQ47733) Fatal exception sent to the driver when
                 loading soon after unloading on systems with KR PHY

        Cause:   The unload function was called twice in a recursive way and the
                 handling of the load call was overwritten

        Fix:     Lock the unload function from being called recursively

    Enhancements:
    -------------
    1.  Request: DCBX - Change L2/iSCSI default priority to 0

        Change:  Change ETS and APP features to contain priority 0 for L2 and
                 iSCSI

    2.  Request: Minimize GRC TO reports in the MCP debug trace

        Change:  The FLR check is accessing the PCI and when doing so while
                 there is no main power, a GRC time-out event is generated.
                 Since there is no power, this event is meaningless. To minimize
                 these reports, the FLR is called only while main power is
                 present (however, main power might go down while the function
                 is running, so some GRC TO events will still be logged)

Version 6.0.19 (May 3, 2010)
============================
    Fixes:
    ------
    1.  Problem: After nvram changes (such as "nvm cfg" and "nvm upgrade") reset
                 without power cycle will fail

        Cause:   The PCI is not configured after MCP reset from the diag, but
                 the PCI hold-off was still set

        Fix:     Clear the PCI hold-off on MCP reset (not a chip reset)

        Impact:  Introduced in 6.0.18

    2.  Problem: Intermittent longer latency in NCSI traffic while running on
                 Vaux

        Cause:   Clean ups that are suppose to happen on power chagnes were
                 constantly ran while running in Vaux since the second port per
                 path was checked

        Fix:     Check power changes on the same port

        Impact:  57712 only

    3.  Problem: LCPLL clock is initialized for both paths instead of one-time
                 per chip

        Cause:   LCPLL register is per chip and not per path

        Fix:     Initialize LCPLL only once

        Impact:  57712 only

Version 6.0.18 (April 29, 2010)
===============================
    Fixes:
    ------
    1.  Problem: License doesn't validate on second path

        Cause:   Used parameter from 1st path instead of second path

        Fix:     Use the appropriate parameter for license validation.

        Impact:  Second path, 57712 only

    2.  Problem: (CQ47178) DCBX: Clear remote MIB after TTL expiration when link
                 is down.

        Cause:   TTL timer was stopped after link down.

        Fix:     Do not stop the TTL timer when link goes down.

        Impact:  57712 only

   3.  Problem: (CQ47172) DCBX: Sequence number does not increment during
                 initial negotiation with Brocade.

        Cause:   Broacde packets were discarded due to lack of APP TLV therefore
                 sequence number was not incremented.

        Fix:     Increment sequence number anyway.

        Impact:  57712 only

   4.  Problem: (CQ46348, CQ46744) When changing from multi-function mode to
                single function mode, a crash happens

        Cause:   Up to 6 functions disappear when changing from multi function
                 mode to single function mode. The crash happens when trying to
                 access functions that were hidden.

        Fix:     Do not change PCI configuration without full chip reset

    Enhancements:
    -------------
    1.  Request: DCBX - Separating FCoE and L2 traffic classes into two
                 different PBF Tx queues.

        Change:  Setting iSCSI default priority to be the same as L2. PRI=1.

    2.  Request: DCBX - Increase remote Chassis/Port IDs payload. Allocate
                 memory for local Chassis/Port IDs and DCBX Tx/Rx statistics.

        Change:  Allocate per path/port array for local Chassis/Port IDs and
                 Tx/Rx statistics and give offset to it in Shmem2.

    3.  Request: Clear PFC configuration when setting link parameters

        Change:  As requested

Version 6.0.17 (April 15, 2010)
===============================
    Fixes:
    ------
    1.  Problem: (DCBX) Packet is not sent immediately after link up.

        Cause:   After DRV MSG arrives, packet transmission fails due to link
                 down. When link goes up we do not transmit but only after 1sec
                 timeout.

        Fix:     Send DCBX packet when link goes up.

        Impact:  57712 only

    2.  Problem: (CQ47105) Function 7 or 5 (VNIC 4 or 3 on the second port)
                 were not marked as loaded correctly

        Cause:   The port parameter was accounted twice and caused the higher
                 function on port 1 to be out of range

        Fix:     Support the second port correctly

        Impact:  57711 only, introduced in 6.0.6

    3.  Problem: (DCBX) While working vs. Brocade Tx ack packet waits 1sec as
                 a response to packet with no APP TLV.

        Cause:   Rx packet with no APP TLV is considered as parsing error and
                 discarded. However we update remote MIB and should ack it
                 immediately.

        Fix:     When receiving this packet and ack is needed then send ack at
                 once.

        Impact:  57712 only.

    4.  Problem: (CQ47175) DCBX: Remote MIB doesn't clear after receiving
                 shutdown LLDPDU

        Cause:   After receiving Shutdown LLDPDU on specific path, remote MIB is
                 not cleared

        Fix:     Clear appropriate Remote MIB upon detection of Shutdown LLDPDU

        Impact:  57712 only

    5.  Problem: L2B load failure was not reported

        Cause:   The function returned value was not checked and the posted
                 response on the mail box was always success

        Fix:     Check the loading result

    Enhancements:
    -------------
    1.  Request: (CQ46212) Do not advertised SR-IOV if MAC partitioning is
                 active

        Change:  After receiving MAC partitioning configuration, if function 0
                 has a valid MAC address, disable SR-IOV

    2.  Request: Allow disabling SR-IOV via nvram option without power cycle

        Change:  If SR-IOV is disabled in the nvram, make sure the PCI is set
                 accordingly without trusting the HW reset values (since the HW
                 might have been configured differently in previous boot)

Version 6.0.16 (April 11, 2010)
===============================
    Fixes:
    ------
    1.  Problem: (CQ46885) Boards that were programmed from scratch with ediag
                 6.0.9 or later

        Cause:   The bootcode checked for core reset configuration and allowed
                 changing the configuration of the bootcode not to be reset on
                 core reset even though the code flows did not support such
                 configuration

        Fix:     The bootcode should ignore the "core reset" configuration and
                 keep the HW default - MCP reset on core reset

        Impact:  Introduced due to diag default configuration for new boards in
                 ediag 6.0.9 for all designs

Version 6.0.15 (April 08, 2010)
===============================
    Fixes:
    ------
    1.  Problem: (CQ46366) Local MIB does not accept Remote MIB parameters on
                 Brocade.

        Cause:   NW trace shows that Brocade switch does not send APP TLV while
                 working vs. DCBX bootcode.

        Fix:     If we detect that APP TLV is missing on Rx then we transmit APP
                 TLV with error and all other features TLVs without error.

        Impact:  57712 only

    2.  Problem: No WoL link on BCM8073 /BCM8727 based boards

        Cause:   Arguments Phy of port0 were given as input for both ports.

        Fix:     Set phy arguments to each port severalty.

        Impact:  57712 only

    3.  Problem: Some events, such as, DCBX, DCC commands, PMF migration and
                 link notification for non PMF were not received on the second
                 path on 57712

        Cause:   Bootcode used the wrong general attention when trying to
                 signal drivers on the second path

        Fix:     Use expected general attentions

        Impact:  57712 only

Version 6.0.14 (April 06, 2010)
===============================
    Fixes:
    ------
    1.  Problem: (CQ46970) Diag fails to recognize devices after upgrading to
                 bootcode 6.0.13

        Cause:   Depending on nvram configuration, on some boards, the VF status
                 blocks in the IGU HW block were configured even if the PF was
                 not present

        Fix:     Configure VFs only if the PF is valid

        Impact:  Introduced in 6.0.13 for 57712 only

    2.  Problem: (CQ46984) bootcode fatal attention received

        Cause:   LLDP info and ADMIN MIB structures are each defined per
                 path/port in a mixed manner instead of strict path separation.
                 Driver has to take the other path into consideration while
                 working in a specific path. That causes it to access wrong
                 scratchpad areas and to overwrite them by mistake.

        Fix:     Separate LLDP info and Admin MIB per path and supply offsets
                 per path.

        Impact:  Introduced in 6.0.13 for 57712 only

    Enhancements:
    -------------
    1.  Request: Limit universal licensing of specific OEM to manufacturing
                 license only

        Change:  As requested

    2.  Request: (DCBX) Initialize LLH with LLDP MAC addresses only when DCBX is
                  enabled.

        Change:  Initialize LLH when DCBX is enabled in shmem. In basic switch
                 LLDP mode the LLH will not be initialized.

    3.  Request: (DCBX) Replace all asserts with attentions to prevent hanging
                 the bootcode when unexpected condition accrues

        Change:  Put condition + trace + attention instead of assert

Version 6.0.13 (April 01, 2010)
===============================
    Fixes:
    ------
    1.  Problem: (CQ46873) Upgrading the bootcode to 6.0.12 causes the adapter
                 to become hidden when accessing thru ediag

        Cause:   Uninitialized ports counter for 57711

        Fix:     Set number of ports to 2 as default for 57711/E

        Impact:  Introduced in 6.0.12 for 57711/E only

    2.  Problem: IGU was configured for VFs even when SRIOV was disabled

        Cause:   The PCI value was checked regardless of SRIOV configuration
                 and the value "0" was interpreted as single MSI-X vector per VF

        Fix:     Check if SRIOV is enabled before configuring VF data in IGU

        Impact:  57712 only

    Enhancements:
    -------------
    1.  Request: Support T6.0 NCSI FW image

        Change:  Changed the version checker to the new NCSI version format

    2.  Request: Support Switch Independent (MAC partitioning) integration with
                 MBA

        Change:  In this mode, when CLP DONE is received, the outer vlan is not
                 set. Check if the functions are enabled

        Impact:  MBA 6.0.9 or later is required

    3.  Request: Support more than a single CLP done event without reset

        Change:  Do no trust the first configuration of the PCI functions and
                 un-hide all the functions that should be visible

Version 6.0.12 (March 22, 2010)
===============================
    Fixes:
    ------
    1.  Problem: 4 ports boards failed after exiting diag

        Cause:   Diag tried to preserve MF configuration. The bootcode assumed
                 that any MF configuration implies 2 ports only

        Fix:     The bootcode considers the ports mode even when setting MF
                 configuration

    2.  Problem: (CQ46660) Bootcode hangs following MSI configuration for higher
                 PCI functions

        Cause:   One of the MSI configuration was written to wrong address

        Fix:     Fix setting of MSI mask bit

        Impact:  Introduced in T6.0

    3.  Problem: (CQ46299) DCBX: Duplicated PFC cause Remote MIB to zero.

        Cause:   Remote MIB is always zeroed upon packet reception and filled
                 during parsing.

        Fix:     Leave Remote MIB intact and update it only if parsing was
                 successful.

        Impact:  57112 only

    4.  Problem: (CQ46313) DCBX: DCBX packet is incorrect length cause Remote
                 MIB to zero.

        Cause:   Remote MIB is always zeroed upon packet reception and filled
                 during parsing.

        Fix:     Leave Remote MIB intact and update it only if parsing was
                 successful.

        Impact:  57112 only

    5.  Problem: (CQ46420) DCBX: Local Chassis/Port ID are zeroed after
                 successful negotiation.

        Cause:   When Rx timeout expires we do not copy local Chassis/Port IDs
                 back to Admin.

        Fix:     Copy Local Chassis/Port IDs after each driver message.

        Impact:  57112 only

    6.  Problem: BCM8073 isn't able to link up on specific board

        Cause:   The default state of the GPIO1 is high and the PHY might not be
                 in the good reset state after a POR

        Fix:     Toggle GPIO1 from LOW to HIGH during common init

        Impact:  57112 + 8073

    7.  Problem: (CQ46467) Bootcode hangs on 57712 dual port chips with WoL
                 enabled

        Cause:   Bootcode scan all possible 4 ports and the data for the unused
                 ports was invalid

        Fix:     Scan only applicable ports

        Impact:  57112 only

    8.  Problem: (CQ46366) DCBX: negotiation failure with Brocade.

        Cause:   We do not send APP error when receiving no APP TLV.

        Fix:     Send APP error in outgoing frame when detecting that APP TLV
                 was not received.

        Impact:  57112 only

    Enhancements:
    -------------
    1.  Request: Add support dual-media with optional swapped configuration

        Change:  As requested

    2.  Request: Add support in default GPIO setting through nvram configuration

        Change:  As requested

    3.  Request: Validate that NCSI version is at least 2.0.4 and refuse to load
                 older versions of NCSI

        Change:  As requested

    4.  Request: Clean up the MCP trace

        Change:  Removed frequent and uninformative prints such as VPD access,
                 and interrupt handler debug prints.

    5.  Request: Remove DCBX functionality from 57711

        Change:  Removed vast majority of the DCBX code, leaving only basic LLDP
                 functionality on 57711. 57712 still has full DCBX support

    6.  Request: Add support for force 1G for KR triggered by new nvm cfg
                 option 127: "Force KR enabler"

        Change:  As requested.

        Impact:  KR(BCM8073)

Version 6.0.11 (March 04, 2010)
===============================
    Fixes:
    ------
    1.  Problem: Bootcode hangs when using MSI

        Cause:   Invalid MSI configuration

        Fix:     Set correct MSI data

    2.  Problem: DCBX: (CQ46250) Remote MIB update during duplicate Port TLV

        Cause:   Remote MIB/seq and ack numbers was not updated correctly

        Fix:     Reset MIB when DCBX packet error, update it only when packet is
                 parsed correctly. The same with seq/ack numbers.

    3.  Problem: DCBX: (CQ46299) Remote MIB update during duplicate PFC TLV

        Cause:   Remote MIB/seq and ack numbers was not updated correctly

        Fix:     Reset MIB when DCBX packet error, update it only when packet is
                 parsed correctly. The same with seq/ack numbers.

    4.  Problem: DCBX: (CQ46313) Remote MIB update during Chassis ID TLV removal

        Cause:   Remote MIB/seq and ack numbers was not updated correctly

        Fix:     Reset MIB when DCBX packet error, update it only when packet is
                 parsed correctly. The same with seq/ack numbers.

    5.  Problem: DCBX: (CQ46315) Remote MIB update during duplicate DCBX TLV
                 too big

        Cause:   Remote MIB/seq and ack numbers was not updated correctly

        Fix:     Reset MIB when DCBX packet error, update it only when packet is
                 parsed correctly. The same with seq/ack numbers.

    6.  Problem: (CQ45734) 57712E: Intermittent PCIE Fatal Err: Critical Event
                 sensor, bus fatal error (Slot 2) was asserted

        Cause:   FCP checking should be disabled

        Fix:     Disable FCP checking

    7.  Problem: On some 57712 boards, LED are configured to check external PHY
                 status even when internal PHY status should be checked

        Cause:   Wrong strapping pins values

        Fix:     Set the HW to override the strapping pins values

    Enhancements:
    -------------
    1.  Request: Add support for MAC Partitioning

        Change:  Allocate space for func_ext_cfg in mf_cfg structure

Version 6.0.10 (Feb 24, 2010)
=============================
    Fixes:
    ------
    1.  Problem: DCBX - Copy Admin shadow to Local MIB instead of the driver
                 received Admin

        Cause:   Bootcode may send wrong DCBX packet

        Fix:     Copy the driver received Admin instead of shadow

    2.  Problem: 57712: VPD does not work for the second path

        Cause:   The second path values are the same as the first one and not as
                 expected in the code

        Fix:     Use right values for the second path

        Impact:  57712 only

    3.  Problem: VF FLR doesn't work for the second path

        Cause:   Driver wasn't interrupt for VF FLR on the second path

        Fix:     Fix interrupt trigger

        Impact:  57712 only

    4.  Problem: FW counters hold invalid numbers

        Cause:   Port statistics location ran over internal counters

        Fix:     Relocate port statistics

        Impact:  57712 only

    5.  Problem: (CQ45858) 57712 PCI Compliance test failure - Device Serial
                 Number capability

        Cause:   FW updated the read only copy of the register with the serial
                 number

        Fix:     Write the serial number to the appropriate register

        Impact:  57712 only

    6.  Problem: Potential corruption of max counters by port statistics

        Fix:     Relocate port statistics

        Impact:  57712 only

    7.  Problem: MCP doesn't received ACK on FLR from the firmware on path1

        Cause:   Access to the firmware registers was done using global PFs,
                 rather than PFs 0,2,4,6 which the firmware expects on each path

        Fix:     Set the appropriate function when accessing firmware registers,
                 as well as the expected ack arrays.

        Impact:  57712 only


    Enhancements:
    -------------
    1.  Request: Restore license enforcement on 57712

        Change:  As requested

    2.  Request: (CQ46039) Add universal licensing scheme for OEM

        Change:  As requested

Version 6.0.9 (Feb 16, 2010)
============================
    Fixes:
    ------
    1.  Problem: Unable to load driver after MCP reset

        Cause:   Bootcode clears the MSIX vectors after non-POR reset

        Fix:     Clear MSIX vectors only after POR

        Impact:  57712 only

    2.  Problem: Disabling GEN2 doesn't work

        Cause:   Configuration was ignored by the BC

        Fix:     When GEN2 is set to be disabled, configure the PCI accordingly

        Impact:  57712 only

Version 6.0.8 (Feb 12, 2010)
============================
    Fixes:
    ------
    1.  Problem: ASPM isn't configure correctly

        Cause:   Bootcode set the incorrect register in the shmem

        Fix:     Set the correct ASPM register in the pci config space

        Impact:  57712 only

    2.  Problem: Functions were not hide in CLP mode

        Cause:   Incorrect bitmask used to compare the hide flag

        Fix:     Fix hidden function condition

        Impact:  All 5771x family

    3.  Problem: (CQ45905) DCBX - Local chassis ID and port ID are zero.

        Cause:   Was not implemented.

        Fix:     Copy port mac to chassis ID and func mac to port ID.

    4.  Problem: BCM8073 second port doesn't link up

        Cause:   BCM8073 second port was left in low-power mode

        Fix:     Set the appropriate GPIO setting to take each port out of low
                 power mode

        Impact:  57712 only and KR only

Version 6.0.7 (Feb 8, 2010)
============================
    Fixes:
    ------
    1.  Problem: BCM8073 wasn't initialized during common init

        Cause:   In 57712, the second port is actually port0 of the second path,
                 and it wasn't treated like that.

        Fix:     Initialize port0 of both paths of BCM8073 during common init

        Impact:  57712 only and KR only

    2.  Problem: When enabling WoL or Management link, bootcode halts

        Cause:   Bootcode called uninitialized function pointer due to invalid
                 phy count.

        Fix:     Fix phy counting on board.

        Impact:  All 5771x family

Version 6.0.6 (Feb 1, 2010)
============================
    Fixes:
    ------
    1. Problem: 57712 expansion ROM is initialized only for the first path

       Cause:   A different set of register exist for the second path

       Fix:     Initialize the second path as required as well

    2. Problem: 57712 SRIOV and ATC enable/disable was not functioning

       Cause:   Wrong nvram offset was used

       Fix:     Use right offset

    3. Problem: Path1 configuration run over Path0 configuration

       Cause:   The register that marks the beginning of the second shared
                memory is global rather than split per path

       Fix:     Use different registers to mark the beginning of the
                second shared memory per path.

    4. Problem: In 57712 4 port mode functions 2 and 3 (ports 3 and 4) were not
                functional

       Cause:   The port was limited to up to 2

       Fix:     In 4 port mode, the port number is limited to 4

    5. Problem: Loading the fast-path PRAM on behalf of the pre-boot driver does
                not work for the second path

       Cause:   The code did not support loading nvram image to the second path

       Fix:     Added second path support to the code

    Enhancements:
    -------------
    1.  Request: Enhance the MFW (NC-SI) interface to fully support 57712

        Change:  As requested

    2.  Request: Add support for nvram configuration over ASPM disable enable
                 for 57712

        Change:  As requested

    3.  Request: 57712: Use FW based expansion ROM engine

        Change:  As requested

Version 6.0.5 (Jan 28, 2010)
============================
    Fixes:
    ------
    1. Problem: 57712 unloading second port driver while the first port is
                loaded cause fatal attention from the chip (GRC Timeout)

       Cause:   Bootcode reset the mac of path 0 even when assuming control over
                path 1

       Fix:     Initialize the path variable in the bootcode link database

Version 6.0.4 (Jan 27, 2010)
============================
    Fixes:
    ------
    1. Problem: 57712 second path driver cannot load

       Cause:   Indexes meant for the VF on the second path were marked as PF and
                caused the PF driver confusion

       Fix:     Limit the VF range to 6 bits as required

Version 6.0.3 (Jan 27, 2010)
============================
    Fixes:
    ------
    1. Problem: (CQ45457) DCBX - DCBX TLV does not advertise error on first
                packet/after shutdown reception.

       Cause:   Was not initialized/reverted to error.

       Fix:     Init to error when reverting back to ADMIN values or upon
                initialization.

       Impact:  Relevant to 57711E DCBX version only.

    2. Problem: DCBX - DCBX version was not initialized

       Cause:   Was not initialized to CEE.

       Fix:     In init lldp handler initialize to CEE.

       Impact:  Relevant to 57711E DCBX version only.

    3. Problem: DCBX - Duplicate mandatory TLVs after TTL was discovered.

       Cause:   We do not increment the Local MIB seq number.

       Fix:     Identify if TTL TLV arrived if so then increment seq number
                before dropping the packet.

       Impact:  Relevant to 57711E DCBX version only.

    4. Problem: 57712 link is not up

       Cause:   There's difference in AER strapping between 57711 and 57712

       Fix:     Set the XGXS AER to the appropriate value according to the new
                XGXS model

       Impact:  57712 only

    5. Problem: In 57712 4 ports modes, function was not available

       Cause:   The port hide logic was not suited to 4 port mode

       Fix:     Ignore the port hide input for 4 port mode

       Impact:  57712 4 port mode only - port hide is not functional

    6. Problem: No MSI-X in Windows OS

       Cause:   Number of MSI-X vectors per PF is limited to 64 in 57712 but the
                nvram was configured to 72 vectors

       Fix:     Limit the nvram configuration to 64. Also use the nvram value
                for all PFs - do not divide by 4 in multi-function environment
                but use the same value for all function

       Impact:  57712 only

Version 6.0.2 (Jan 25, 2010)
============================
    Fixes:
    ------
    1. Problem: Bootcode doesn't recognize 57712 device id 0x1662

       Cause:   Device id is set as 0x1663 in MISC

       Fix:     Allow both device types to be recognize as 57712

       Impact:  Relevant to 57712

    2. Problem: 1G limitation is triggered by mistake

       Cause:   This limitation should be set only for specific boards, and
                will be considered only if this check is enabled in nvram.

       Fix:     Remove check for 1G limitation for now.

       Impact:  The force 1G feature is disabled for now on 57712

    3. Problem: STORMs PLL are in reset

       Cause:   Were not taken out of reset

       Fix:     Take STORMs PLL out of reset during initialization

       Impact:  Relevant to 57712

Version 6.0.1 (Jan 20, 2010)
============================
    Fixes:
    ------
    1. Problem: DCBX - APP TLV was transmitted with error based on PFC feature
                and not APP feature.

       Cause:   Use PFC feature instead of APP feature.

       Fix:     Rely on APP feature.

       Impact:  Relevant to 57711E DCBX version only.

   2.  Problem: When system reset the device not via PERST assertion, 577xx
                would go through one expected link training sequence
                successfully. However, about 18.9 ms later 577xx will cause
                surprise link down at the rootport

       Cause:   In this case bootcode detects that unprepared power down event
                occurred and therefore cause an immediate hard reset. This was
                done since the HW is in unexpected state.

       Fix:     When the MCP begins to run it checks the unprepared bit. If
                this bit is set, the device is in an inconsistent state, so MCP
                will initiate a "almost Hard Reset" sequence using the GRC
                controllable resets to reset only the specific required blocks.

    3.  Problem: 57712 fail during initialization

        Cause:   Initializing 2 ports instead of single ports for 2-port mode

        Fix:     Initialize ports according to the supported ports per path

    4.  Problem: 57712 PF disable cause BMAC to reset

        Cause:   MCP treated PF disabled like PF FLR and unloaded the driver

        Fix:     In case of PF disable do not unload the driver

    Enhancements:
    -------------
    1.  Request: Add support for expansion ROM for 57712

        Change:  As requested

    2.  Request: DCBX - Discard LLDP frame if duplicate DCBX TLVs exist.

        Change:  As requested

    3.  Request: DCBX - Discard LLDP frame if DCBX TLVs length is incorrect.

        Change:  As requested

    4.  Request: DCBX - Discard LLDP frame if APP TLV is missing in the DCBX TLV

        Change:  As requested

    5.  Request: DCBX - Discard LLDP frame if frame finished without end of
                 LLDPDU TLV.

        Change:  As requested

    6.  Request: DCBX - Discard LLDP frame if encountered unrecognized TLV.

        Change:  As requested

    7.  Request: DCBX - configure LLH to filter packets according to MAC 0,1,2
                 instead of receiving all multicasts.

        Change:  As requested

    8.  Request: Enable E2 bringup without the need for license checking

        Change:  As requested

    9.  Request: Add support for FORCE_1G signal over GPIO3_P0 which limit link
                 speed to up to 1G

        Change:  As requested

   10.  Request: DCBX - Detect duplicated sub DCBX TLVs.
                      - Detect duplicated Mandatory TLVs.
                      - Never report ETS error but revert to Admin.
                      - Update TTL on Rx packet only if packet is valid.

        Change:  As requested

Version 6.0.0 (Jan 7, 2010)
============================
- Bootcode 6.0.0 has few caveats:
-- It supports 57711 and 57712 only (no 57710 support)
-- It enables SW PFC which is for FCoE testing only and should not be enabled on
   57711
-- It does not co-exist with NCSI  it is best to block NCSI load in this
   version.

    Fixes:
    ------
    1.  Problem: Some 57711E chips may appear as 57711

        Cause:   Insufficient read margin when reading chip ID

        Fix:     Configure the HW differently to determine the chip ID

        Impact:  Relevant to 57711/57711E only

    Enhancements:
    -------------
    1.  Request: Add support for BCM8481 and BCM84823 PHYs for 57711/57711E

        Change:  As requested

    2.  Request: Add Initial support for 57712

        Change:  As requested

        Impact:  Many changes in common areas that might cause functionality
                 regression

    3.  Request: Add support in dual-media

        Change:  As requested

        Impact:  Add additional command of handling SFP+ verification


Version 5.2.5 (Sep 14, 2009)
============================

    Fixes:
    ------
    1.  Problem: (CQ43416) License query on port 1 failed with INFO_NOT_READY

        Cause:   Wrong initialization of license holdoff timer for port 1

        Fix:     Correctly initialize the license holdoff timer for port 1

        Impact:  None

    2.  Problem: Possible race with pre OS driver in initialization of PHY
                 after CLP exit done command

        Cause:   Bootcode doesn't consider driver presence before calling
                 init_phy()

        Fix:     Bootcode will consider driver presence before calling
                 init_phy()

        Impact:  None

    Enhancements:
    -------------
        Request: Modify BCM8481 link led configuration in 10G

        Change:  As requested

        Impact:  None

Version 5.2.4 (Sep 3, 2009)
===========================

    Fixes:
    ------
    1.  Problem: 57711/57711E on direct boards unable to link up @ 1G using
                 auto-negotiation

        Cause:   When negotiating using CL73, 1G-KX speed wasn't advertised

        Fix:     In CL73, when 1G speed capability is enabled, advertise 1G-KX,
                 and disable 10G parallel-detect

        Impact:  None

    2.  Problem: 57711/57711E Flow control doesn't work when auto-negotiation
                 complete with CL73

        Cause:   Flow-Control wasn't advertised with CL73

        Fix:     Enable Flow-Control negotiation using CL73

        Impact:  None

Version 5.2.3 (Aug 27, 2009)
============================

    Fixes:
    ------
    1.  Problem: LLDPDU TTL value is same as LLDP transmission interval

        Cause:   LLDPDU TTL value should be (msgTxInterval * msgTxHold)

        Fix:     Set LLDPDU TTL value to (msgTxInterval * msgTxHold)

        Impact:  None

Version 5.2.2 (Aug 24, 2009)
============================

    Fixes:
    ------
    1.  Problem: (CQ43305) After upgrading to the last bootcode version, driver
                 might fail to load

        Cause:   MSIX mask bit fix is applied every MCP reset

        Fix:     Set the MSIX mask bit only after POR

        Impact:  None

Version 5.2.1 (Aug 20, 2009)
============================

    Fixes:
    ------
    1.  Problem: Version 5.2.0 cannot be loaded on 57711

        Cause:   Bad address was used in the code

        Fix:     Fixed the code to use the right offsets

        Impact:  None

Version 5.2.0 (Aug 20, 2009)
============================

    Fixes:
    ------
    1.  Problem: (CQ42528) Enabling "Prevent PCIe L1-entry" option in nvm cfg
                 caused on function to disappear

        Cause:   Wrong PCI register was changed

        Fix:     Use a different PCI register to prevent L1-entry

        Impact:  None

    2.  Problem: MSIX mask bit is cleared for all entries in MSIX table

        Cause:   Wrong reset values

        Fix:     Set the MSIX mask bit for all entries in MSIX table

        Impact:  None

    3.  Problem: Link is down with BCM8481 when connected to 1G device after
                 it was connected to 100M device

        Cause:   When link type changes from SGMII to GMII/XGMII, the SGMII
                 configuration wasn't removed

        Fix:     Remove SGMII configuration in non-SGMII link type

        Impact:  None

    4.  Problem: BCM8481 link is down after cable plug out/in

        Cause:   New BCM8481 image required new configuration of LED4 signal
                 which generate the interrupt

        Fix:     Detect link down using the LED4 signal rather than the BCM8481
                 registers

        Impact:  None

    5.  Problem: (CQ35477) Incorrect display of External Phy Firmware Version
                 for Everest XFP board

        Cause:   External Phy Firmware Version for XFP boards used to display
                 0000:0000

        Fix:     Change display in this case to "N/A"

        Impact:  None

    6.  Problem: In BCM8727, spirom was loaded first on slave port, rather than
                 on the master port. This may lead to xaui pll issue

        Cause:   Port-Swap wasn't considered when loading spirom to the BCM8727,
                 hence first the slave port was loaded with the spirom

        Fix:     First load the SPIROM to the master port

        Impact:  None

    7.  Problem: In BCM8727 base boards, link is down intermitted after loading
                 the interface

        Cause:   In BCM8727 No-OverCurrent board designs, link up registers
                 gets updated 10us after link up LASI is received

        Fix:     Add 100us delay after LASI is triggered before reading link
                 status

        Impact:  None

    8.  Problem: WoL and NCSI link on 57710 might not be reported correctly

        Cause:   The PHY register was read twice and could lead to inconsistency

        Fix:     Read the PHY status only once

        Impact:  None

    Enhancements:
    -------------
    1.  Request: Add LLDP support with custom organizationally specific
                 extension

        Change:  As requested

        Impact:  None

    2.  Request: (CQ41112) PHY LED programming for BCM8481 on BlackBird
                  (BCM957711A1100G) production board

        Change:  As requested

        Impact:  None

    3.  Request: (CQ41067) Add support for CL73 to CX4 boards

        Change:  As requested

        Impact:  None

    4.  Request: Support fan failure detection with BCM8481 PHY

        Change:  As requested

        Impact:  None

Version 5.0.11 (July 01, 2009)
==============================

    Fixes:
    ------
    1.  Problem: Link up time takes too long with BCM8727 based NICs

        Cause:   EDC mode is not set automatically

        Fix:     Set EDC mode manually according to the SFP+ module type
                 detected (Passive DAC / Active DAC / LC-LRM / LC-SR / LC-LR)

        Impact:  None

    2.  Problem: (CQ41567) In BCM8727 based NICs, when SFP+ module is not
                 plugged, there is continuous messages of Link Down

        Cause:   The EDC tries to process the Rx data/noise because its OPRXLOS
                 input signal is false (low), indicating an Rx signal is
                 present.

        Fix:     Perform Or of the Active Module Absent Level with the Active
                 Laser Loss of Light Level. This way we tell the EDC not
                 process Rx data/noise when the module is not present.

        Impact:  None

Version 5.0.10 (June 18, 2009)
==============================

    Fixes:
    ------
    1.  Problem: (CQ42071) On 57711E, MCP parity attention with old eVBD
                 versions

        Cause:   Fix from boot code 5.0.3 was broken

        Fix:     Clear spad area of 0x200 dwords (0x800 bytes) starting from
                 BC2 start address to avoid parity error if accessed by mistake
                 by driver

        Impact:  None

    Enhancements:
    -------------
    1.  Request: Disable PCI L1 entry according to nvm cfg 86

        Change:  As requested

        Impact:  None

    2.  Request: (CQ41252) Preserve the MFW data after hard reset - clear it
                 only on POR event

        Change:  As requested

        Impact:  None

Version 5.0.9 (June 08, 2009)
=============================

    Fixes:
    ------
    1.  Problem: Get licensing key works only for port zero

        Cause:   The port parameter was not taken into account in all places

        Fix:     Get the license key for the requested port

        Impact:  None

Version 5.0.8 (June 04, 2009)
=============================

    Enhancements:
    -------------
    1.  Request: Support nvram option 85 that force expansion ROM advertisement
                 even when MBA is disabled

        Change:  As requested

        Impact:  None

Version 5.0.7 (June 01, 2009)
=============================

    Fixes:
    ------
    1.  Problem: GRC timeout warning string in "mcp trace" when setting WoL

        Cause:   The correct SerDes was not selected

        Fix:     Select the correct SerDes before setting WoL

        Impact:  For 57711 and 57711E only (not 57710)

    Enhancements:
    -------------
    1.  Request: Add support for BCM8727_NOC

        Change:  As requested

        Impact:  None

    2.  Request: Support module image revision 1 without warning string

        Change:  As requested

        Impact:  Revision 0 of the module image (which was supported only by
                 bootcode version 5.0.6) is no longer supported

Version 5.0.6 (May 26, 2009)
============================

    Enhancements:
    -------------
    1.  Request: Allow enabling and disabling the fan failure mechanism for
                 different PHY types

        Change:  Determine if fan failure enforcement is required according to
                 nvram option 83 (which can indicate that the fan is related to
                 the PHY type)

        Impact:  None

    2.  Request: Add support for link using the BCM8727 PHY

        Change:  As requested

        Impact:  None

    3.  Request: Allow disabling ASPM Support according to nvm cfg option 84

        Change:  As requested

        Impact:  For 57711 and 57711E only (not 57710)

    4.  Request: Save code space by removing WoL and NCSI support from BCM8705,
                 BCM8072 and SFX7101

        Change:  As requested

        Impact:  No WoL or NCSI support on BCM8705, BCM8072 or SFX7101 PHY -
                 currently, there are no plans for production board that
                 requires those features with those PHYs

    5.  Request: Add support for DCC spec 1.6

        Change:  As requested

        Impact:  None

    6.  Request: Remove WoL and NCSI support for BCM8481

        Change:  As requested

        Impact:  No WoL nor NCSI support for BCM8481

Version 5.0.5 (May 10, 2009)
============================

    Fixes:
    ------
    1.  Problem: (CQ40370) Bootcode fail to setup 10G link

        Cause:   Incorrect writing and reading of WB registers

        Fix:     Correct the writing and reading of WB registers

        Impact:  For 57711 and 57711E only (not 57710)

    Enhancements:
    -------------
    1.  Request: Add fan failure support for BCM8727

        Change:  As requested

        Impact:  None

Version 5.0.4 (May 04, 2009)
============================

    Fixes:
    ------
    1.  Problem: Per function statistics addresses from MFW for the non PMF
                 drivers are still not initialized when the PMF driver loads

        Cause:   Only the loaded driver's per function statistics address was
                 initialized

        Fix:     Initialize all per function statistics addresses when the PMF
                 driver loads

        Impact:  None

    2.  Problem: NCSI needs to know the maximum supported functions

        Cause:   Parameter was removed from fw_info

        Fix:     Return back max_func_num to fw_info

        Impact:  None

    3.  Problem: DCC link notification packets might be send out

        Cause:   DCC link notification was partially implemented

        Fix:     Remove sending DCC link notification packets

        Impact:  None

Version 5.0.3 (Apr 27, 2009)
============================

    Fixes:
    ------
    1.  Problem: DCC is in disabled state after CLP exit done

        Cause:   DCC expects for a redundant dynamic configuration enabled bit

        Fix:     Remove the redundant bit

        Impact:  None

    2.  Problem: DCC sends link state up for unloaded driver

        Cause:   DCC didn't consider the driver state

        Fix:     Consider driver state to determine link status

        Impact:  None

    3.  Problem: DCC sends link notification up for unloaded driver

        Cause:   Link notification is sent from a static area and the link
                 status field was not updated before sending

        Fix:     Update the correct link sttaus before sending

        Impact:  None

    4.  Problem: (CQ40409, CQ40411) MCP parity attention with old eVBD versions

        Cause:   During PMF migration the driver read the port's statistics
                 from invalid address in the chip, causing HW attention

        Fix:     Clear rest of spad area of BC2 to avoid parity error if
                 accessed by mistake by driver

        Impact:  None

    Enhancements:
    -------------
    1.  Request: Clear MFW save area in shared memory after POR

        Change:  As requested

        Impact:  None

Version 5.0.2 (Apr 16, 2009)
============================

    Fixes:
    ------
    1.  Problem: Endianness issue in some u16 fields in some DCC packets

        Cause:   Bad definition of some DCC TLVs lack the 2 bytes alignment
                 required for using u16 fields

        Fix:     Swap the bytes as array of two u8 fields

        Impact:  None

    Enhancements:
    -------------
    1.  Request: Support forcing SF mode without power-cycle

        Change:  Hide the higher functions according to the nvram configuration

        Impact:  If changed from MF to SF, the higher functions will remain in
                 limbo state from the OS perceptively until reboot

Version 5.0.1 (Apr 07, 2009)
============================

    Fixes:
    ------
    1.  Problem: On 57710, Bootcode asserts if 1G SerDes link is requested
                 after driver unload

        Cause:   SerDes was set by driver to Clause45 mode

        Fix:     Re-init the SerDes to Clause22 mode

        Impact:  None

    2.  Problem: (CQ40352) Bootcode stuck after loading an old NCSI image

        Cause:   Old NCSI images are not supported

        Fix:     Check NCSI image version before loading

        Impact:  None

    3.  Problem: On 57710, Bootcode fails to setup a link when set to autoneg
                 and link-partner is set to forced speed

        Cause:   Clause73 autoneg is not working

        Fix:     Clause73 autoneg is not supported

        Impact:  None

    4.  Problem: BCM8481 is not able to link up in legacy speeds

        Cause:   Setting legacy speeds requires additional phy configuration
                 and speed analysis

        Fix:     Enable legacy speeds for this phy

        Impact:  None

    Enhancements
    ------------
    1.  Request: Eliminate possible bootcode stuck due to assert

        Change:  Convert asserts to error prints

        Impact:  None

    2.  Request: Driver can reset the NIG during unload. Restore NIG registers,
                 that were initialized by bootcode, after driver unload

        Change:  As requested

        Impact:  None

Version 5.0.0 (Apr 02, 2009)
============================

    Fixes:
    ------
    1.  Problem: On 57711/57711E, bootcode clears some latched attentions even
                 if there is a driver loaded

        Cause:   ISR didn't check if a driver is loaded

        Fix:     Clear latched attentions only if no driver is present

        Impact:  None

    2.  Problem: (CQ39172) On 57711/57711E, there might be holes in PCI INT#
                 This is not compliant with PCI specification

        Cause:   PCI INT# allocation was not correct

        Fix:     Fix PCI INT# allocation to be compliant with PCI specification

        Impact:  None

    3.  Problem: (CQ39625) On 57711/57711E, there might be signal integrity
                 issue with PCI Gen 2

        Cause:   Default PCI SerDes pre-emphasis values are not appropriate for
                 all cases

        Fix:     Config the PCI SerDes pre-emphasis according to NVRAM
                 configuration parameter

        Impact:  None

    Enhancements
    ------------
    1.  Request: Allow forcing single function mode using SGPIO4

        Change:  Enhanced option 73 in "nvm cfg" to use either fixed value or
                 SPIO4 to force single function mode. When using SPIO, high
                 means only SF, 0 is according to CLP configuration

        Impact:  None

    2.  Request: Add support for DCC

        Change:  As requested

        Impact:  None

    3.  Request: Support new NCSI image starting from version 1.0.7

        Change:  As requested

        Impact:  Old NCSI images are not supported

Version 4.8.51 (Feb 04, 2009)
=============================

    Fixes:
    ------
    1.  Problem: "ext_phy_fw version" command for BCM8706 sometimes shows
                 invalid version number

        Cause:   The version number is read during init phase. Reading the
                 BCM8706 version during init phase is done premature

        Fix:     During init phase of the BCM8706, wait until the firmware
                 is loaded completely before reading the version number

        Impact:  None

    2.  Problem: When setting pre-emphasis values for external phys, the
                 XGXS is also set

        Cause:   In external-phy boards, when pre-emphasis values were set in
                 the nvram, both the external phy and the XGXS pre-emphasis
                 values were set, while the values fit the external phy only

        Fix:     Set pre-emphasis values in XGXS only for direct type boards

        Impact:  None

    Enhancements
    ------------
    1.  Request: Improve expansion_rom_handling()

        Change:  Read from NVRAM only the requested size of dwords instead of
                 reading always the maximum (3) dwords

        Impact:  None

    2.  Request: Add ability to change BCM8726 TX PreEmphasis using nvram
                 configuration

        Change:  When nvram config "Override pre-emphasis configuration" (75)
                 is set, use Tx pre-emphasis nvram configuration (47), lane0
                 value to set the Main Tap and lane1 to enable TX-PreEmphasis
                 in BCM8726

        Impact:  None

    3.  Request: Add basic support for BCM8481

        Change:  As Requested

        Impact:  None

Version 4.8.50 (Jan 19, 2009)
=============================

    Fixes:
    ------
    1.  Problem: 1G switch configuration (using the 5th lane) doesn't work

        Cause:   Support for Serdes (5th lane) was not maintained since no
                 production design used it and when switching to CL45 it stopped
                 working

        Fix:     In order for control the Serdes over Clause45, (and not
                 Clause22), it requires first one time register setting in
                 Clause22

        Impact:  None

    Enhancements
    ------------
    1.  Request: Add support for BCM8726

        Change:  As requested

        Impact:  None

Version 4.8.0 (Oct 28, 2008)
============================

    Fixes:
    ------
    1.  Problem: Simultaneous VPD access to more than 1 function on
                 57711 caused bootcode to hang

        Cause:   The bootcode tried to determine which function tried
                 to access the VPD and failed to recognize when more
                 than one function was register for VPD access

        Fix:     The bootcode can handle all functions request

        Impact:  None

    Enhancements:
    -------------
    1.  Problem: (CQ35662) Add support for the nvm cfg options, 47, 48
                 for XGXS core

        Cause:   Current nvm values didn't actually affect the phy

        Fix:     To keep backward compatibility, only in case the
                 "Override pre-emphasis configuration" nvm option is
                 enables, it sets the the tx pre-emphasis and rx
                 equalizer values for the 4 lanes according to the "XGXS
                 backplane Tx pre-emphasis matrix coef." and "XGXS
                 backplane Rx equalizer matrix coef." respectively

        Impact:  None

Version 4.6.3 (Sep 28, 2008)
============================

    Enhancements:
    -------------
    1.   Request: Strict licensing enforcement

         Change:  As Requested.

         Impact:  Boards with older versions of the licensing scheme
                  will not support offloaded connections

    2.   Request: Support NCSI filters reconfiguration

         Change:  After the last driver is unloaded, the NCSI FW
                  receives indication so the incoming traffic filters
                  can be reconfigured

         Impact:  None

Version 4.6.2 (Sep 23, 2008)
============================

    Enhancements
    ------------
    1.  Request: Add inventory table for NCSI

        Change:  As requested

        Impact:  NCSI version 1.0.3 or later is needed. Earlier versions
                 of NCSI will not work with this bootcode

    2.  Request: (CQ36860) For 57710: use NVRAM pre-emphasis
                 configuration if this option is enabled

        Change:  In case of WoL, or NCSI the boot code will need to
                 initialize the PHY with the correct values

        Impact:  WoL and NCSI.  No impact or dependencies on device
                 drivers

Version 4.6.1 (Sep 03, 2008)
============================

    Fixes:
    ------
    1.  Problem: (CQ35240) 57711E sometimes cannot work as 57711

        Cause:   Using a configuration parameter before loading it from NVRAM

        Fix:     Load the parameter from NVRAM before using it

        Impact:  None

    2.  Problem: (CQ34605) Machine gets stuck if it gets "pause" constantly

        Cause:   Ramrods cannot pass when tx ring is full

        Fix:     Set NIG drain in case of NIG timer max event

        Impact:  None

Version 4.6.0 (Aug 24, 2008)
============================

    Enhancements
    ------------
    1.  Request: Add a mode on which SPIO4 follows PERST

        Change:  As requested (nvm cfg 78)

        Impact:  None

    2.  Request: Set PHY related G/SPIOs according to the PHY type

        Change:  As requested

        Impact:  The nvram board type entry has no effect

Version 4.5.10 (Aug 14, 2008)
=============================

    Fixes:
    ------
    1.  Problem: PCI Serial number is all zeros

        Cause:   The PCI serial number was not initialized from the
                 NVRAM

        Fix:     Initialize the PCI serial number

        Impact:  None

Version 4.5.9 (Aug 14, 2008)
============================

    Fixes:
    ------
    1.  Problem: WoL after POR sometimes fails

        Cause:   The 8073 SPI-ROM loading fails

        Fix:     Retry the SPI-ROM loading

        Impact:  None

Version 4.5.8 (Aug 12, 2008)
============================

    Fixes:
    ------
    1.  Problem: XAUI link on port0 goes down and then up, when the link
                 on port1 is changed

        Cause:   When master port (port1) is down, it will also cause
                 the blade side down. In turn, PLL will change speed
                 from 10G to 1G. It will cause XAUI clock to both ports
                 down and then up again

        Fix:     Set bit in the BCM8073 that enables the fix

        Impact:  None

Version 4.5.7 (Aug 10, 2008)
============================

    Fixes:
    ------
    1.  Problem: (CQ36772) KR with 8073 PHY sometimes does not establish
                 link

        Cause:   A missing delay between initializing the PHY SPI ROM
                 and inserting the PHY back to low power mode

        Fix:     Add 15ms delay after loading the SPI PHY ROM which is
                 before entering low power mode

        Impact:  None

    2.  Problem: (CQ36773, CQ36777, CQ36778) WoL with 8073 PHY sometimes
                 establish link with the switch but there is no link
                 between the 5771x and the 8073 PHY

        Cause:   The port initializing started before the SPI-ROM ended

        Fix:     Do not start port initialization before SPI-ROM
                 download to the PHY ended

        Impact:  None

Version 4.5.6 (Aug 08, 2008)
============================

    Fixes:
    ------
    1.  Problem: When upgrading 8073 SPI ROM PHY to version 0103 the
                 link will not come up

        Cause:   Register 0x8370 is no longer required in the new
                 version and writting to it cause the link not to come
                 up

        Fix:     Remove the wirte to address 0x8370

        Impact:  None

Version 4.5.5 (Aug 07, 2008)
============================

    Fixes:
    ------
    1.  Problem: On some KR boards when loading driver on port0, and
                 port1 is not loaded, sometimes the XAUI link is not
                 coming up and sometimes when unloading driver on port1
                 port 0 might loose link

        Cause:   The 8073 PHY has two ports that share a single clock.
                 This clock is routed to a port deemed to be the master
                 (port 1), and then a PLL at the master sets the clock
                 frequency and routes the buffered clock to both the
                 master XAUI interface as well as the slave (port 0)
                 XAUI interface. If port 0 is loaded while the 8073 PHY
                 SPI ROM is not loaded, the PLL for port 0 is not
                 guaranteed to lock. If port 1 is unloaded while port 0
                 is in use, the port 0 PLL might loose lock

        Fix:     First driver to be loaded reset and download SPI ROM on
                 both ports of the 8073 PHY during one-time
                 initialization and no driver will reset the 8073 PHY.
                 The bootcode is resetting the PHY when the last driver
                 is unloaded and then set the link for both ports for
                 WoL according to driver and nvram configuration

        Impact:  The 8073 PHY is only reset when both ports are brought
                 down

Version 4.5.4 (July 28, 2008)
=============================

    Fixes:
    ------
    1.  Problem: (CQ36510) Link LED does not turn off when 1G link is
                 lost when external PHY is present

        Cause:   The current code manually turned off the 10G LED but
                 did not handled other speeds which are controlled by HW.
                 Since the HW detect link with the external PHY, the
                 link LED stayed on

        Fix:     Turn off the LED for all speeds manually when link goes
                 down

        Impact:  None

Version 4.5.3 (July 17, 2008)
=============================

    Fixes:
    ------
    1.  Problem: MFW fails to check if driver is present or not

        Cause:   The function that validates the driver state should
                 set the heap pointer and it should be set back on exit

        Change:  Change the heap pointer when calling the function

        Impact:  The MFW should set the heap pointer back after calling
                 this function

    2.  Problem: The 8073 was put into high power mode even if not used

        Cause:   The 8073 was set to high power mode after every reset

        Change:  The 8073 will be set to high power mode only if needed

        Impact:  Any component that uses the 8073 will need to set it
                 to high power mode before using it

    3.  Problem: Port Swap is not working on 57711

        Cause:   In the 57711 the GPIOs are also swapped by default when
                 port swap is used

        Change:  Revert the GPIO swapping by bootcode after reset to
                 maintain the same flow in the drivers for 57710 and
                 57711

        Impact:  The GPIO are not swapped on the 57711 when swapping is
                 enabled

    4.  Problem: Tx Pause were not send on 1G link

        Cause:   Missing initialization to the EMAC TX_MODE

        Change:  Set FLOW_EN bit in the TX_MODE in addition to the
                 EXT_PAUSE_EN

        Impact:  None

    5.  Problem: (CQ36361) Changing speed to 1G on KR switch side
                 results in no link in OS

        Cause:   When Serdes is configured to 1G, it should remove
                 setting MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_SEL bit in
                 MDIO_REG_BANK_SERDES_DIGITAL

        Change:  Unset MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_SEL bit for
                 every link change

        Impact:  None

    Enhancements
    ------------
    1.  Request: Optimize link setup and support 2.5G

        Change:  Link will be configured on the external PHY before
                 setting up the internal PHY. When needed, only the
                 external PHY will be configured to autoneg. The
                 internal PHY will be set to the obtained speed

        Impact:  None

    2.  Request: BC2 on 57710 does not support loading old MFW
                 (i.e. IPMI or UMP)

        Change:  As requested

        Impact:  None

Version 4.5.2 (July 07, 2008)
=============================

    Fixes:
    ------
    1.  Problem: (CQ36180) VBD upgrade/downgrade on 57711 might result
                 in BSOD

        Cause:   The driver mailbox was cleared as if power transition
                 occurred

        Change:  Check the condition to clear the mailbox only after
                 power transition

        Impact:  None

    2.  Problem: Possible GPIO change for second port

        Cause:   Version 4.5.1 changed the GPIO register without HW lock
                 and thus created a rare race with the driver of the
                 other port

        Change:  Acquire HW lock when the other driver might be up when
                 changing GPIO status

        Impact:  None

    Enhancements
    ------------
    1.  Request: Support 57710 on the T4.5 branch

        Change:  As requested - a separate image is created for 57711
                 and for 57710

        Impact:  None

Version 4.5.1 (July 04, 2008)
=============================

    Fixes:
    ------
    1.  Problem: (CQ35420) System hang during driver load/unload stress
                 testing

        Cause:   Earlier generations of chipset do have problems when
                 the PCI-E link is driven "aggressively" into L1, while
                 in D3H. In case the downstream LOM/NIC decided to
                 re-enter L1 (while in D3H) and the upstream PCI-E link
                 partner (chipset) is waiting for an outstanding split
                 response (from the downstream LOM/NIC) it is possible
                 for certain chipsets to not enter L1.  This in return
                 will cause a DEADLOCK of the PCI-E link what ultimately
                 will lead to a system error (e.g. system reboot, or
                 hang)

        Change:  In order to not expose this chipset anomaly, we  will
                 now prevent the PCI-E link from re-entering L1 while in
                 D3H. This may not be a 100% fix for all chipsets, but
                 will significantly reduce the exposure to this
                 interoperability issue.

        Impact:  no functional system impact, though the power
                 consumption is minimal higher while in D3H.

    2.  Problem: Failed to WoL according to driver's request when nvram
                 was not configured for OOB WoL

        Cause:   The EMAC block was reset after each link changed and so
                 driver's settings were lost

        Change:  The emac is reset only when setting up the link

        Impact:  None

    3.  Problem: Driver's MAC address was not used in WoL

        Cause:   The EMAC block was reset after each link changed and so
                 driver's settings were lost

        Change:  The emac is reset only when setting up the link. The
                 driver's MAC address needs to be saved by the bootcode
                 and reprogrammed to the EMAC

        Impact:  None

    4.  Problem: WoL did not work if magic packet was received before
                 the device entered D3

        Cause:   The WoL was triggered due to the first magic packet and
                 so a new magic packet (the first in D3) did not make
                 any effect

        Change:  The magic packet indication is cleared whenever power
                 goes down and the emac is enabled

        Impact:  None

    5.  Problem: (CQ35786) S5 WoL did not work after Windows shutdown

        Cause:   The bootcode reset the MAC twice - the second time
                 erased the MAC address

        Change:  The bootcode finish initializing the link before
                 acknowledging the driver request

        Impact:  In case a link is needed (like in the WoL case) driver
                 unload will take longer due to waiting for the MCP to
                 initialize the link (but not waiting for link to come
                 up)

    6.  Problem: (CQ35846) S5 WoL did not work on second port after OS
                 shutdown

        Cause:   The second port PHY was not set to high power mode

        Change:  Set the second port to high power mode when needed

        Impact:  None

    7.  Problem: (CQ36047, CQ36057) Windows driver fails to re-load when
                 WoL enabled in NVRAM (will fail in many configuration
                 changes that involves driver unload behind the scenes
                 like MTU change and diagnostic tests)

        Cause:   The bootcode returned unload response twice - first
                 time to allow the driver to finish unloading without
                 waiting for the bootcode to set the PHY and the second
                 time after the PHY initialization was done. The second
                 response was received after the driver reloaded and
                 caused the failure

        Change:  Hold the driver unload response until the link is
                 initialized

        Impact:  In case a link is needed (like in the WoL case) driver
                 unload will take longer due to waiting for the MCP to
                 initialize the link (but not waiting for link to come
                 up)

Version 4.5.0 (May 26, 2008)
============================

    Fixes:
    ------
    1.  Problem: Potential OS freeze when disabling or uninstalling
                 drivers

        Cause:   Per PCI specification, when the LOM is put into D3-Hot
                 (D3H), it will initiate the PCI-E link to transition
                 from L0 to L1. It is still possible for the system to
                 'talk' to the LOM while in D3H, using configuration
                 read and write cycles. So when the upstream chipset is
                 sending those commands, the link temporarily returns to
                 L0 before the downstream LOM initiates the link to
                 return back into L1. The time prior to driving the
                 PCI-E link back into L1 while in D3H is 8 usec (HW
                 default). We have observed that this time is rather
                 aggressive and may cause certain chipsets to lock up
                 during the L0->L1 transition what may freeze the
                 system, or can even cause a BSOD, depending on the
                 chipset configuration.

        Change:  Extend the L1 re-entry delay from 8 usec to 16 usec.

        Impact:  None

    Enhancements
    ------------
    1.  Request: Support 8073 external PHY for 57711E

        Change:  As requested

        Impact:  None

    2.  Request: Support WoL for 57711E

        Change:  As requested

        Impact:  None

    3.  Request: Retry to set the link after POR every ~15 seconds

        Change:  As requested

        Impact:  None

Version 4.4.6 (May 07, 2008)
============================

    Fixes:
    ------
    1.  Problem: (CQ34943, CQ34968, CQ35003) Bootcode asserts after
                 driver unload when WoL is enabled

        Cause:   The driver changed the NIG to CL45 and the bootcode is
                 using CL22

        Change:  Change the NIG to CL22 before initializing the link

        Impact:  None

    2.  Problem: On some boards (T1000, A1020G and T1015G) the link
                 was establish after reset

        Cause:   The bootcode took the external PHY out of reset

        Change:  The bootcode does not touch the external PHY

        Impact:  Older drivers that counted on the bootcode to take the
                 PHY out of reset will not work with the new bootcode

Version 4.4.5 (April 28, 2008)
==============================

    Fixes:
    ------
    1.  Problem: Eliminate possible time out on host access to the NVRAM
                 at the same time when the boot code is loading
                 management firmware

        Cause:   The MCP checked the lock register constantly and
                 blocked the driver access to it

        Change:  Added delay between NVRAM polling

        Impact:  None

    Enhancements
    ------------
    1.  Request: Enhance VMAC support to persist until cold boot

        Change:  Reserve area at start of MCP scratch pad to store the
                 virtual MAC addresses

        Impact:  BC1 and MFW moved to start at address 0x08000020


Version 4.4.4 (April 1, 2008)
=============================

    Fixes:
    ------
    1.  Problem: 57711 MSI configuration is broken

        Cause:   More than one function can ask for MSI configuration
                 at a given time

        Change:  Work on all functions that request MSI configuration

        Impact:  None

    2.  Problem: 57711 driver cannot unload after missing a periodic
                 heartbeat

        Cause:   The driver port was not extracted correctly

        Change:  Fixed the code to extract the driver port

        Impact:  None


Version 4.4.3 (April 1, 2008)
=============================

    Enhancements
    ------------
    1.  Request: Changing the default interrupts for 57711 to use INT-C
                 and INT-D as well

        Change:  As requested

        Impact:  None

    2.  Request: Add attentions (debug) for reserved GRC access

        Change:  As requested

        Impact:  None

    3.  Request: Enable interrupts for 57711

        Change:  As requested

        Impact:  None

    4.  Request: Clear all 57710 A0 support

        Change:  Removed PERST detection and core clock changes

        Impact:  None

    5.  Request: Always reload PCI configuration on 57711

        Change:  As requested

        Impact:  None

    6.  Request: Allow the driver to resume after not responding in
                 57711

        Change:  As requested

        Impact:  None


Version 4.4.2 (March 20, 2008)
==============================

    Fixes:
    ------
    1.  Problem: Wrong link indication after driver unload on 57711

        Cause:   Link indication was cleared on every driver unload

        Change:  Clearing the link indication only when needed

        Impact:  None

    Enhancements
    ------------
    1.  Request: Enumerate 8 functions on PCI only if 57712 chip or
                 FPGA/Emulation

        Change:  As requested

        Impact:  None


Version 4.4.1 (March 11, 2008)
==============================

    Fixes:
    ------
    1.  Problem: Functions were not accessible when some functions
                 were disabled

        Cause:   There is a different MEMORY_SPACE control register for
                 each function

        Change:  Fix to access with the correct function

        Impact:  None

    Enhancements
    ------------
    1.  Request: Set defaults to all CLP fields

        Change:  As requested

        Impact:  None

    2.  Request: Update the statistics structure

        Change:  As requested

        Impact:  None


Version 4.4.0 (March 03, 2008)
==============================

    Enhancements
    ------------
    1.  Request: (CQ32483) Add VMAC support

        Change:  As requested

        Impact:  None

    2.  Request: Add TOE Handshake support

        Change:  As requested

        Impact:  None

    3.  Request: Remove 57710-A0 Support

        Change:  As requested

        Impact:  A0 chips will not work with this bootcode

    4.  Request: Add 57711 Support in a different binary

        Change:  As requested

        Impact:  There are two binaries for each release starting with
                 this one


Version 4.2.0 (February 03, 2008)
=================================
*** This version requires  driver 4.2.x (0.42.x) or above! ***

    Enhancements
    ------------
    1.  Request: (CQ33571) new 'shared memory' layout for T4.0E/T4.2 that will
                 be compatible with T4.4 new features

        Change:  As requested

        Impact:  All drivers (including pre-boot) must be 4.2.x or above


Version 4.0.14 (January 27, 2008)
=================================

    Enhancements:
    -------------

    1.  Request: Set SPIO 4 to high output after reset on the A1021G and A1022G

        Change:  As requested

        Impact:  None

    2.  Request: Include the chip ID in the combined bootcode image

        Change:  As requested

        Impact:  None

Version 4.0.13 (January 16, 2008)
=================================

    Fixes:
    ------
    1.  Problem: No traffic LED blink on Rx traffic in less then 10G link speed

        Cause:   For link speeds below 10G, the LED blink is controlled by the
                 bootcode. The bootcode checked only the Tx statistics when it
                 should check the Rx statistics as well

        Change:  Check both Rx and Tx statistics

        Impact:  None

    2.  Problem: (CQ #33400) Remove the 'D' (for debug) and the image type from
                 the version string

        Cause:   The redundant information was part of the string

        Change:  Removed the 'D' and the version string

        Impact:  None

    Enhancements:
    -------------

    1.  Request: Supporting the GPIO and SPIO setting for A1021G

        Change:  As requested

        Impact:  None

Version 4.0.12 (January 01, 2008)
=================================

    Enhancements:
    -------------

    1.  Request: Use hard reset and not iPOR in case of unprepared core reset

        Change:  As requested

        Impact:  None

    2.  Request: Add fan failure detection and PHY power down for the A1022G

        Change:  In case of continues 10 seconds fan failure (indicated by
                 SPIO5) on the A1022G, the MCP will shutdown the PHY. (reset
                 and low power mode, using GPIO1+2)

        Impact:  None

    3.  Request: Increasing the FW reserved space in the shared memory for
                 NC-SI support

        Change:  The FW space was increased to 440 bytes instead of 320

        Impact:  None

    4.  Request: Change the PCI device acceptable LOS and L1 latency
                 capabilities

        Change:  After POR and hard reset, the PCI device acceptable LOS and L1
                 latency capabilities were updated

        Impact:  None

    5.  Request: (CQ 32505) Report the type of the active MFW

        Change:  The validity map now includes 3 bits to indicate which MFW is
                 active

        Impact:  None

    6.  Request: Clear the iscsi boot signature and offset after every reset

        Change:  As requested

        Impact:  None

Version 4.0.11 (December 14, 2007)
===================================

    Fixes:
    ------
    1.  Problem: Unprepared reset without PERST did not cause hard reset

        Cause:   The unprepared recovery scheme assumed that every reset will
                 be accompanied by PERST and in some cases this is not true

        Change:  After core reset, if the unprepared bit is set, the MCP will
                 force hard reset

        Impact:  The MCP should not be reset while the driver is loaded or else
                 the MCP will cause hard reset

    2.  Problem: The PCI common clock bit is set

        Cause:   The common clock was set as a partial workaround for an issue
                 in A0 silicon

        Change:  The setting was removed (even in A0 since it did not make much
                 different)

        Impact:  A0 might have more stability issues but the statistics is not
                 proven

    3.  Problem: The device was not accessible if BAR1 was set to 0 in the nvram

        Cause:   The bootcode programmed BAR1 to 0, and therefore the driver
                 could not access the device any more

        Change:  Avoid programming a value of zero to BAR1

        Impact:  This is a silence discard of a wrong nvram configuration,
                 other values in the nvram can still cause damage

    4.  Problem: The device was lost if the PCI ID was set to something
                 different then BRCM 5710

        Cause:   The ediag only recognize the BRCM 5710 chip

        Change:  Avoid programming a value different then 0x14e4164e

        Impact:  This is a silence discard of a wrong nvram configuration,
                 other values in the nvram can still cause damage

    Enhancements:
    -------------

    1.  Request: Supporting the GPIO setting for A1022G

        Change:  As requested

        Impact:  None

    2.  Request: Setting the output GPIO's to a definite value

        Change:  Whenever a GPIO is "set" validate that it is not "clear" and
                 vice versa

        Impact:  None

Version 4.0.10 (November 15, 2007)
===================================

    Fixes:
    ------
    1.  Problem: MCP Fatal error when working with invalid SerDes/XGXS

        Cause:   The MCP attempted to access the SerDes/XGXS even when
                 it was not connected

        Change:  Check the nvram configuration to validate that the SerDes
                 or XGXS is connected

        Impact: None

    2.  Problem: (CQ #32064) System hangs at POST after enabling MBA on A1

        Change:  The chip revision and metal version were read in reverse order
                 so A1 seems like B0 and therefore skipped the expansion ROM
                 ECO and thus the MCP kept serving the same interrupt

        Fix:     Reversing the metal and revision order in the bootcode

        Impact:  None

    3.  Problem: Licensing information was not decoded properly

        Change:  Port 1 licensing information was read into port 0 area
                 and thus killed both ports licensing information

        Fix:     Port 1 is now read into the right location

        Impact:  None

    4.  Problem: (CQ #31120) The traffic LED was not active for lower
                 speeds

        Cause:   A workaround in the main loop is required to set the traffic
                 LED when the speed is less then 10G (using the emac and not
                 the bmac)

        Change:  The set LED routine was updated and a new function which is
                 called at least once every 5ms was added

        Impact:  None

    Enhancements:
    -------------

    1.  Request: Read the MAC address from the NVRAM rather than from the
                 shared memory to overcome a licensing failure when VMAC is
                 applied on NIC

        Change:  As requested

        Impact:  None

    2.  Request: Support dynamic (via SPIO) port swap in A1 or later

        Change:  Reading the SPIO on top of the nvram setting (xoring the
                 two)

        Impact:  None

    3.  Request: Clearing the MCP scratchpad parity error after every reset
                 and not just after POR

        Change:  As requested

        Impact:  None

    4.  Request: Support the same licensing structure is Xinan

        Change:  Changed the licensing structure to the Xinan structure

        Impact:  The shared memory mapping was shifted due to this change and
                 the STORM FW need to use a new location as well.
                 Another limitation is that the BCM57710 will only support 64K
                 licensed connections
                 The MFW (UMP and IPMI) must be of version 4.0.10 or later as
                 well

Version 4.0.9 (October 08, 2007)
===================================

    Fixes:
    ------
    1.  Problem: A0 Workarounds are applied on A1 chip

        Cause:   The A0 value cleared any Ax version

        Fix:     Check the chip metal revision as well as the chip
                 revision.


    2.  Problem: IPMI problems while Linux driver is loaded

        Cause:   The UMP pointer was translated to host point of view
                 which caused NULL pointer to be translated into GRC
                 address 0xA0000 (the location of the IPMI FW on the
                 MCP scratchpad). Only the Linux driver supported the
                 UMP statistics until this bootcode version, and so,
                 when IPMI was enabled and Linux driver was loaded,
                 the IPMI behavior is unexpected

        Fix:     When UMP FW is not present, the UMP statistics pointer
                 will appear as NULL pointer from the driver perspective
                 as well and the driver will not update them.


    Enhancements:
    -------------

    1.  Removing the debug PCI counters from version 4.0.7
    2.  Changing the licensing scheme to STORM polling
    3.  Supporting nvram function hide configuration
    4.  Supporting NC-SI image load
    5.  Not masking the NIG interrupts even if the NIG attention is not
        desired to support driver timeout due to debug break-point.
    6.  Making sure that the driver is marked as present whenever it sends
        a driver pulse (allows partial recovery from missing a pulse)


Version 4.0.8 (September 24, 2007)
===================================

    Fixes:
    ------
    1.  Problem: GRC Timeout when working in 10Mbit

        Cause:   The GRC timeout period was too short for the emac when
                 the clock was 10MHz

        Fix:     Enhanced the GRC timeout value.

    Enhancements:
    -------------

    1.  Releasing the GRC timeout attention only if there is no driver
        present.
    2.  Adding support for the T1003G


Version 4.0.7 (August 30, 2007)
===================================

    Enhancements:
    -------------

    1.  Adding a procedure to save PCI counters for the FF bug investigation


Version 4.0.6 (August 27, 2007)
===================================

    Fixes:
    ------

    1.  Problem: No MBA after warm-boot

        Cause:   The PCI parameters were set only if the PCI link training
                 hold-off succeeded.

        Fix:     Setting the PCI parameters regardless of the link hold-off
                 State.

    2.  Problem: No PCI link in case MFW is enabled and not present

        Cause:   Fatal error in case the MFW load failed

        Fix:     Replacing the fatal error with a debug print

    3.  Problem: Setting the MDIO voltage nvram configuration to 1.2V required
                 full power cycle.

        Cause:   The MDIO voltage controller was only set according to the nvram
                 configuration and not cleared.

        Fix:     Clearing the MDIO voltage bit when set to 1.2V

    Enhancements:
    -------------

    1.  Setting the Beacon according to NVRAM configuration
    2.  Improving the 10G link support (which is not part of the release)

Version 4.0.5 (August 13, 2007)
===================================

    Enhancements:
    -------------
    1.  Setting to PCI common clock (Adding partial workaround
        for the core reset bug/the FF bug)


Version 4.0.4 (August 09, 2007)
===================================

    Enhancements:
    -------------
    1.  Disabling licensing functionality
    2.  Clearing the GRC timeout attention only if driver is not present


Version 4.0.3 (August 09, 2007)
===================================

    Fixes:
    ------
    1.  Problem: Driver was assumed to be not responding

        Cause:   Cyclic calculation error on the driver pulse timeout

        Fix:     Fixed the driver pulse time stamp check

    2.  Problem: Single port device will not function after clearing
                 the nvram configuration and setting it from scratch

        Cause:   The PCI vendor ID was checked on the disabled function
                 as well and an ASSERT condition was activated if it was
                 invalid.

        Fix:     Remove the assert due to invalid PCI vendor ID

    Enhancements:
    -------------

    1.  Change the VAUX enable/disable default value in A0
    2.  Enable MSI-X on main power on event
    3.  Adding automation to the image new naming format
        (<XX>710v<Major><Minor>.<Build>)
    4.  Enabling the licensing code (changing the boundaries of BC2
        and UMP/IPMI to support it).
    5.  Loading the L2B FW in phases to allow MFW to run between the
        load time of each STORM
    6.  Adding Busy indication while loading the L2B FW
    7.  Integrating bug fixes to the link code from Windows/Linux drivers
    8.  Removing the GRC time-out assert (only debug print report)
    9.  UMP - reducing the size of some debug print to reduce code size
    10. UMP - using the emac auto clear statistics registers


Version 4.0.2 (July 10, 2007)
===================================

    Fixes:
    ------
    1.  Problem: Traffic blink rate was not working properly

        Cause:   The values of the link rate were wrong

        Fix:     Use new set of blink rate values

    Enhancements:
    -------------
    1.  Added support for T1015G (NOAC)


Version 4.0.1 (June 14, 2007)
===================================

    Enhancements:
    -------------

    1.  Switched to new compiler gcc-3.4.6
    2.  IPMI - Fix to handle Directed SMBus ARP commands (ResetDevice
        and GetUDID) after AssignAddress command
    3.  UMP - Workaround for CQ28981 - BCM57710: UMP: INGRESSBURST_DONE
        event is not issued for more than 10 sec - reset the UMP ingress
        (MAC and FIO interface) side after time out
    4.  UMP - Workaround for CQ29602 - BCM57710: UMP: Egress FIFO indicates
        incorrect byte count if LAN cable is disconnected while egress
        traffic is running - flush egress packets if NIG is still busy after
        time out in order to prevent running into egress FIFO full

